Approved by AICTE, New Delhi
Affiliated to Bikaner Technical University, Bikaner
Affiliated to Board Of Technical Education,Jodhpur
PRATAP Institute of Technology & Science
Admissions Helpline: +91 – 9610444555 /888

Kapilachander T.

B.E.,M.E.

Designation :Assistant Professor

Email :kapil@pitscollege.com

VLSI design,Digital Electronics,Principles of Electronics

1. “Technical Study on Low Power VLSI Methods”, “International Journal information Engineering and Business” Vol.1, Page 60-70, February – 2012

2. “Edge Detection System using Pulse Mode Neural Network for Image Enhancement” “international Journal Image, Graphics and Signal Processing” April 2012

3. “Denoising of Noisy Pixels in Video by Neighborhood Correlation Filtering Algorithm” “international Journal Image, Graphics and Signal Processing” July 2012

4. “Low Power Area Efficient Multiplier Using Shannon Based Multiplexing Logic” “ International Journal of Embedded System and Applications” Vol.2, No.2, June 2012

5. “Power Optimized Multiplier Using Shannon Based Multiplexing Logic: “I.J Intelligent System and Applications” Vol.6, Pages 39 – 45, June 2012

6. “ A Comparative Study of VLSI 3D placement for Power Management and Wire Length Minimization”, “International Journal of Engineering Research and Technology “ Special Issue-2018”

7. Attended International level conference and done a paper presentation about “An Efficient Memetic Algorithm for VLSI Placement Problem” ” at Velammal Engineering College, Chennai,Tamil Nadu.